CLA
"Computer
Logic and Algorithms"
(formerly known as ICT - Incredibly Cruely Torture)
(Mr. Rodriguez would like you to know the course as "Understanding
CLA" - in other words, UCLA!!!)
We affectionately
refer to it as "Incredibly Cruel Torture(the students think the
T stands for Teacher - imagine that!)". ICT/Digital Technology
is an introduction to the basic concepts and skills of modern electronics
and computers. This class can be used as a prerequisite for more advanced
classes in electronics and computers. Topics covered include numbering
systems, logic gates, boolean algebra, Karnaugh maps, flip flops, shift
registers, counters, adders, subtractors, and a few other fun things.
Students wire all labs using breadboards. This might just be one of
the coolest computer classes out there (wow, do we sound like geeks).
Software to draw logic diagrams
Some pics
of the labs we do
Here
are the documents that
Mr. Allen,
Mr. Reid,
Mr.
Goodman, Mr. Grack and/or
Mr.
Coglianese will be using this semester.
Draw
and Experiment with Logic Circuits
Cool Wiring Program
Signature
Sheet
You
may need the free
Acrobat reader to view/print these. 
|
|
MISC |
| |
Course
Expectations -- Chapman
Presentation |
| Logic
Diagrams |
LogicGatesAutoCad.dwg
(thanks to Spencer Detlev - class of 2003, this file will work in AutoCad2000,
AutoCad2000i, and Architectual Design 2i)
Bitmap Images of LogicGates and
FlipFlops |
Pinouts
Diagrams for TTL IC's |
(7400,
7402, 7404, 7408, 7410, 7420, 7432, 7447, 7474, 7476, 7483, 7486, 74147,
74192, 74194, 7-segment LED's) These are the logic gates such as not,
and, or, nand, nor, xor, along with flip flops(D, JK, RS), adders, and BCD
decoders/encoders. |
| Our
Lab |
typical
student work station |
| Charts |
ASCII
- Hex - Binary - Decimal |
| Test
Logic Circuits |
Java
Applet
letting you test logic circuits - even build your own. |
|
HOMEWORK
ASSIGNMENTS |
| Numbering
Systems |
Conversion
Diagram |
| |
HW0 (non-decimal to decimal) |
| |
HW1(decimal to non-decimal) |
| |
HW2
(base2 <->base10, non <-> non) |
| |
HW3
(conversions) |
| |
HW4 (addition) |
| |
Pre
Test 1 -- PreTest 2(new)
-- Pre Test 2 Answers |
| |
Take-Home
Quiz |
| Logic
Gates |
HW1
(Not-And-Or & Truth Tables) |
| |
HW2
(conversion between boolean alg. expression and logic circuit) |
| |
HW3
(more problems like HW2) |
| |
HW4
(even more circuits) |
| |
Wave
Form Diagrams |
| |
Logic
Gates Pretest |
| Karnaugh
Maps |
In-Class
Worksheet (take students through process) |
| |
HW0
(NAND Gate Implementations - the Universal gate) |
| |
HW1
(minterm expressions and K-Maps - 2 and 3 variable) |
| |
HW2
(minterm expressions and K-Maps - 3 variable) |
| |
HW3
(minterm expressions and K-Maps - 3 and 4 variable) |
| Boolean
Algebra |
HW1
(Boolean Alg Lecture Notes) |
| |
HW2 |
| |
HW3
(DeMorgan's Laws Packet) |
| |
HW4
(Distributive Law Packet) |
| |
Absorption,
BoolAlg, DeMorgan (Absorption
Packet) |
| |
Pretest
1 |
| |
Pretest
2 |
| Door-Goat-Wolf
|
Door-Goat-Wolf
Project (ties many previous concepts together) (Heat
Project) |
| Flip
Flops |
RS
and Clock-RS FlipFlop Chart |
| |
RS-FlipFlop
Wave Form |
| |
JK-FlipFlop
Wave Form |
| |
Flip
Flop Charts |
| |
Flip
Flop Pretest |
| Counters |
Up
Counter |
| |
Down
Counter |
| |
7493
Integrated Counter |
| Shift
Registers |
Parallel-In
Parallel-Out Worksheet |
| |
Serial-In
Parallel-Out D-FlipFlop Shift Reg |
| |
Parallel-Load
with JK FlipFlop In-Class Example |
| |
HW1 |
| |
HW2 |
| |
HW3 |
| |
74194
Universal Shift Register |
| |
Pretest |
| Adders/Subtractors |
One's
Complement |
| |
Pretest |
| Final |
review |
|
|
|
|
